SEMI-CenterNet: A Machine Learning Facilitated Approach for Semiconductor Defect Inspection

Continual shrinking of pattern dimensions in the semiconductor domain is making it increasingly difficult to inspect defects due to factors such as the presence of stochastic noise and the dynamic behavior of defect patterns and types. Conventional rule-based methods and non-parametric supervised machine learning algorithms like KNN mostly fail at the requirements of semiconductor defect inspection at these advanced nodes. Deep Learning (DL)-based methods have gained popularity in the semiconductor defect inspection domain because they have been proven robust towards these challenging scenarios. In this research work, we have presented an automated DL-based approach for efficient localization and classification of defects in SEM images. We have proposed SEMI-CenterNet (SEMI-CN), a customized CN architecture trained on SEM images of semiconductor wafer defects. The use of the proposed CN approach allows improved computational efficiency compared to previously studied DL models. SEMI-CN gets trained to output the center, class, size, and offset of a defect instance. This is different from the approach of most object detection models that use anchors for bounding box prediction. Previous methods predict redundant bounding boxes, most of which are discarded in postprocessing. CN mitigates this by only predicting boxes for likely defect center points. We train SEMI-CN on two datasets and benchmark two ResNet backbones for the framework. Initially, ResNet models pretrained on the COCO dataset undergo training using two datasets separately. Primarily, SEMI-CN shows significant improvement in inference time against previous research works. Finally, transfer learning (using weights of custom SEM dataset) is applied from ADI dataset to AEI dataset and vice-versa, which reduces the required training time for both backbones to reach the best mAP against conventional training method

Automated Semiconductor Defect Inspection in Scanning Electron Microscope Images: a Systematic Review

A growing need exists for efficient and accurate methods for detecting defects in semiconductor materials and devices. These defects can have a detrimental impact on the efficiency of the manufacturing process, because they cause critical failures and wafer-yield limitations. As nodes and patterns get smaller, even high-resolution imaging techniques such as Scanning Electron Microscopy (SEM) produce noisy images due to operating close to sensitivity levels and due to varying physical properties of different underlayers or resist materials. This inherent noise is one of the main challenges for defect inspection. One promising approach is the use of machine learning algorithms, which can be trained to accurately classify and locate defects in semiconductor samples. Recently, convolutional neural networks have proved to be particularly useful in this regard. This systematic review provides a comprehensive overview of the state of automated semiconductor defect inspection on SEM images, including the most recent innovations and developments. 38 publications were selected on this topic, indexed in IEEE Xplore and SPIE databases. For each of these, the application, methodology, dataset, results, limitations and future work were summarized. A comprehensive overview and analysis of their methods is provided. Finally, promising avenues for future work in the field of SEM-based defect inspection are suggested.Comment: 16 pages, 12 figures, 3 table

YOLOv8 for Defect Inspection of Hexagonal Directed Self-Assembly Patterns: A Data-Centric Approach

Shrinking pattern dimensions leads to an increased variety of defect types in semiconductor devices. This has spurred innovation in patterning approaches such as Directed self-assembly (DSA) for which no traditional, automatic defect inspection software exists. Machine Learning-based SEM image analysis has become an increasingly popular research topic for defect inspection with supervised ML models often showing the best performance. However, little research has been done on obtaining a dataset with high-quality labels for these supervised models. In this work, we propose a method for obtaining coherent and complete labels for a dataset of hexagonal contact hole DSA patterns while requiring minimal quality control effort from a DSA expert. We show that YOLOv8, a state-of-the-art neural network, achieves defect detection precisions of more than 0.9 mAP on our final dataset which best reflects DSA expert defect labeling expectations. We discuss the strengths and limitations of our proposed labeling approach and suggest directions for future work in data-centric ML-based defect inspection.Comment: 8 pages, 10 figures, accepted for the 38th EMLC Conference 202

A route towards the fabrication of 2D heterostructures using atomic layer etching combined with selective conversion

Heterostructures of low-dimensional semiconducting materials, such as transition metal dichalcogenides (MX2), are promising building blocks for future electronic and optoelectronic devices. The patterning of one MX2 material on top of another one is challenging due to their structural similarity. This prevents an intrinsic etch stop when conventional anisotropic dry etching processes are used. An alternative approach consist in a two-step process, where a sacrificial silicon layer is pre-patterned with a low damage plasma process, stopping on the underlying MoS2 film. The pre-patterned layer is used as sacrificial template for the formation of the top WS2 film. This study describes the optimization of a cyclic Ar/Cl2 atomic layer etch process applied to etch silicon on top of MoS2, with minimal damage, followed by a selective conversion of the patterned Si into WS2. The impact of the Si atomic layer etch towards the MoS2 is evaluated: in the ion energy range used for this study, MoS2 removal occurs in the over-etch step over 1–2 layers, leading to the appearance of MoOx but without significant lattice distortions to the remaining layers. The combination of Si atomic layer etch, on top of MoS2, and subsequent Si-to-WS2 selective conversion, allows to create a WS2/MoS2 heterostructure, with clear Raman signals and horizontal lattice alignment. These results demonstrate a scalable, transfer free method to achieve horizontally individually patterned heterostacks and open the route towards wafer-level processing of 2D materials

Atomic layer deposition applications 12

The objective of the current study was to explore the role of ABCB1 and CYP3A5 genetic polymorphisms in predicting the bioavailability of tacrolimus and the risk for post-transplant diabetes. Artificial neural network (ANN) and logistic regression (LR) models were used to predict the bioavailability of tacrolimus and risk for post-transplant diabetes, respectively. The five-fold cross-validation of ANN model showed good correlation with the experimental data of bioavailability (r2 = 0.93-0.96). Younger age, male gender, optimal body mass index were shown to exhibit lower bioavailability of tacrolimus. ABCB1 1236 C>T and 2677G>T/A showed inverse association while CYP3A5*3 showed a positive association with the bioavailability of tacrolimus. Gender bias was observed in the association with ABCB1 3435 C>T polymorphism. CYP3A5*3 was shown to interact synergistically in increasing the bioavailability in combination with ABCB1 1236 TT or 2677GG genotypes. LR model showed an independent association of ABCB1 2677 G>T/A with post transplant diabetes (OR: 4.83, 95% CI: 1.22-19.03). Multifactor dimensionality reduction analysis (MDR) revealed that synergistic interactions between CYP3A5*3 and ABCB1 2677 G>T/A as the determinants of risk for post-transplant diabetes. To conclude, the ANN and MDR models explore both individual and synergistic effects of variables in modulating the bioavailability of tacrolimus and risk for post-transplant diabetes

An investigation on border traps in III-V MOSFETs with an In0.53Ga0.47As channel

Continuing CMOS performance scaling requires developing MOSFETs of high-mobility semiconductors and InGaAs is a strong candidate for n-channel. InGaAs MOSFETs, however, suffer from high densities of border traps, and their origin and impact on device characteristics are poorly understood at present. In this paper, the border traps in nMOSFETs with an In0.53Ga0.47As channel and Al2O3 gate oxide are investigated using the discharging-based energy profiling technique. By analyzing the trap energy distributions after charging under different gate biases, two types of border traps together with their energy distributions are identified. Their different dependences on temperature and charging time support that they have different physical origins. The impact of channel thickness on them is also discussed. Identifying and understanding these different types of border traps can assist in the future process optimization. Moreover, border trap study can yield crucial information for long-term reliability modeling and device timeto-failure projection

Microwave Properties of Ba-Substituted Pb(Zr0.52_{0.52}Ti0.48_{0.48})O3_3 after Chemical-Mechanical Polishing

We have studied the effect of chemical-mechanical polishing (CMP) on the ferroelectric, piezoelectric, and microwave dielectric properties of Ba-substituted PZT (BPZT), deposited by pulsed laser deposition. CMP allowed for the reduction of the root mean square surface roughness of 600 nm thick BPZT films from 12.1nm to 0.79 nm. Ammonium peroxide (SC-1) cleaning was effective to remove Si CMP residuals. Measurements of the ferroelectric hysteresis after CMP indicated that the ferroelectric properties of BPZT were only weakly affected by CMP, while the piezoelectric d33 coefficient and the microwave permittivity were reduced slightly by 10%. This can be attributed to the formation of a thin dead layer at the BPZT surface. Moreover, the intrinsic dielectric permittivity at microwave frequencies between 1 and 25 GHz was not influenced by CMP, whereas the dead layer series capacitance decreased by 10%. The results indicate that the CMP process can be used to smoothen the BPZT surface without affecting the film properties strongly.Comment: 13 pages of text, 4 tables and 7 figures. This project has received funding from the European Union's Horizon 2020 research and innovation program under grant agreement No. 801055 "Spin Wave Computing for Ultimately-Scaled Hybrid Low-Power Electronics" - CHIRO

Growth Mechanism of a Hybrid Structure Consisting of a Graphite Layer on Top of Vertical Carbon Nanotubes

Graphene and carbon nanotubes (CNTs) are both carbon-based materials with remarkable optical and electronic properties which, among others, may find applications as transparent electrodes or as interconnects in microchips, respectively. This work reports on the formation of a hybrid structure composed of a graphitic carbon layer on top of vertical CNT in a single deposition process. The mechanism of deposition is explained according to the thickness of catalyst used and the atypical growth conditions. Key factors dictating the hybrid growth are the film thickness and the time dynamic through which the catalyst film dewets and transforms into nanoparticles. The results support the similarities between chemical vapor deposition processes for graphene, graphite, and CNT